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| Hauptseite > Publikationsdatenbank > Different architectures of relaxed Si1-xGe/Si preudo-substrates grown by low-pressure chemical vapor deposition: Structural and morphological characteristics |
| Hauptseite > Publikationsdatenbank > Different architectures of relaxed Si1-xGe/Si preudo-substrates grown by low-pressure chemical vapor deposition: Structural and morphological characteristics |
| Journal Article | PreJuSER-16157 |
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2011
Elsevier
Amsterdam [u.a.]
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Please use a persistent id in citations: doi:10.1016/j.jcrysgro.2011.06.035
Abstract: A detailed characterization of SiGe thin layers grown by low-pressure chemical vapor deposition (LP-CVD) on different types of Si buffer layers (BLs) is presented. Using the same conditions of SiGe growth, Si BLs were elaborated in ultra-high vacuum conditions at low (575 degrees C) and medium (700 degrees C) temperatures to improve the crystalline quality of the Si buffer layer. Using both types of Si BLs, the SiGe layer exhibits a very high density of dislocations (> 10(5) cm(-2)). Here, we proposed to create a ductile area in the Si BL, before the SiGe deposition. It consists of nanocavities located at about 100 nm under the Si BL surface and obtained by He+ implantation at 10 key and at room temperature with fluencies of 5 x 10(15) ions cm(-2) or 5 x 10(16) ions cm(-2). The creation of the nanocavity layer is enabled by an annealing step at 700 degrees C for one hour. These kinds of Si BLs were studied by cross section transmission electron microscopy, X-ray diffraction, Rutherford backscattering, photoluminescence, atomic force and optical microscopy before and after revealing the dislocations by the chemical etching of SiGe layers. From these analyses, we evidenced the blocking of threading dislocations by the formation of loops located between the region of nanocavities formed in the substrate and the SiGe/Si interface. This method allows to strongly enhance the relaxation rate (97%) of SiGe layers, and to improve their crystalline and morphological quality for their use for high-speed microelectronic and optoelectronic devices for which the surface roughness and the threading dislocation density are key issues. (C) 2011 Elsevier B.V. All rights reserved.
Keyword(s): J ; Silicon germanium (auto) ; Threading dislocations (auto) ; Strain relaxation (auto) ; Chemical vapor deposition processes (auto) ; Crystal morphology (auto) ; Implantation (auto)
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