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| Hauptseite > Publikationsdatenbank > Performance Evaluation of Scientific Applications on POWER8 > print |
| Hauptseite > Publikationsdatenbank > Performance Evaluation of Scientific Applications on POWER8 > print |
| 001 | 189716 | ||
| 005 | 20210129215422.0 | ||
| 020 | _ | _ | |a 978-3-319-17247-7 (print) |
| 020 | _ | _ | |a 978-3-319-17248-4 (electronic) |
| 024 | 7 | _ | |2 doi |a 10.1007/978-3-319-17248-4_2 |
| 024 | 7 | _ | |2 ISSN |a 0302-9743 |
| 024 | 7 | _ | |2 ISSN |a 1611-3349 |
| 024 | 7 | _ | |2 WOS |a WOS:000362507700002 |
| 037 | _ | _ | |a FZJ-2015-02751 |
| 082 | _ | _ | |a 004 |
| 100 | 1 | _ | |0 P:(DE-Juel1)157723 |a Adinets, Andrey |b 0 |u fzj |
| 111 | 2 | _ | |a 5th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (held as part of SC14) |c New Orleans, LA |d 2014-11-16 - 2014-11-16 |g PMBS 2014 |w USA |
| 245 | _ | _ | |a Performance Evaluation of Scientific Applications on POWER8 |
| 260 | _ | _ | |a Cham |b Springer International Publishing |c 2015 |
| 295 | 1 | 0 | |a High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation / ; Cham : Springer International Publishing, 2015, Chapter 2 ; ISSN: 0302-9743=1611-3349 ; ISBN: 978-3-319-17247-7=978-3-319-17248-4 ; doi:10.1007/978-3-319-17248-4 |
| 300 | _ | _ | |a 24 - 45 |
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| 336 | 7 | _ | |0 PUB:(DE-HGF)8 |2 PUB:(DE-HGF) |a Contribution to a conference proceedings |b contrib |m contrib |s 1570523947_5983 |
| 336 | 7 | _ | |0 PUB:(DE-HGF)7 |2 PUB:(DE-HGF) |a Contribution to a book |m contb |
| 490 | 0 | _ | |a Lecture Notes in Computer Science |v 8966 |
| 520 | _ | _ | |a With POWER8 a new generation of POWER processors became available. This architecture features a moderate number of cores, each of which expose a high amount of instruction-level as well as thread-level parallelism. The high-performance processing capabilities are integrated with a rich memory hierarchy providing high bandwidth through a large set of memory chips. For a set of applications with significantly different performance signatures we explore efficient use of this processor architecture. |
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| 700 | 1 | _ | |0 P:(DE-Juel1)156619 |a Baumeister, Paul F. |b 1 |e Corresponding Author |u fzj |
| 700 | 1 | _ | |0 P:(DE-HGF)0 |a Böttiger, Hans |b 2 |
| 700 | 1 | _ | |0 P:(DE-Juel1)176815 |a Hater, Thorsten |b 3 |u fzj |
| 700 | 1 | _ | |0 P:(DE-HGF)0 |a Maurer, Thilo |b 4 |
| 700 | 1 | _ | |0 P:(DE-Juel1)144441 |a Pleiter, Dirk |b 5 |u fzj |
| 700 | 1 | _ | |0 P:(DE-Juel1)159392 |a Schenck, Wolfram |b 6 |u fzj |
| 700 | 1 | _ | |0 P:(DE-HGF)0 |a Schifano, Sebastiano Fabio |b 7 |
| 773 | _ | _ | |a 10.1007/978-3-319-17248-4_2 |
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