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Optimization of Output Bandwidth from an Intel Paragon

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1994
Concurrent Supercomputing Consortium Pasadena, CA

Pasadena, CA : Concurrent Supercomputing Consortium 6 p. ()

Report No.: CCSF-44

Abstract: We examine the question of how to get maximum output bandwidth from a "real" application running on many nodes of a Paragon. We consider synchronization, flow control, message passing and partition management, and the use of the PARtools performance monitoring and visualization environment to understand and thus optimize these aspects.The application is a "digital VCR": each processor has in memory several compressed video frames, and these are to be decompressed, sent to the Hippi device, and output to a framebuffer at the fastest possible rate. While the Hippi processor is capable of 80 Mbyte/sec, the aggregate bandwidth from the computational processors is 21 Mbyte/sec.In this communication-bound application, we find it optimal to have the communication device (the Hippi processor) to have control, with other processors acting as servers; rather than the processors having distributed control and the Hippi processor acting as server.


Contributing Institute(s):
  1. Jülich Supercomputing Center (JSC)
  2. Zentralinstitut für Angewandte Mathematik (ZAM)
Research Program(s):
  1. 899 - ohne Topic (POF2-899) (POF2-899)

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 Record created 2015-05-19, last modified 2021-01-29



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