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@ARTICLE{Schmidt:203232,
author = {Schmidt, Matthias and Schäfer, Anna and Minamisawa, Renato
and Buca, Dan Mihai and Trellenkamp, Stefan and Hartmann,
Jean-Michel and Zhao, Qing-Tai and Mantl, Siegfried},
title = {{L}ine and {P}oint {T}unneling in {S}caled {S}i/{S}i{G}e
{H}eterostructure {TFET}s},
journal = {IEEE electron device letters},
volume = {35},
number = {7},
issn = {1558-0563},
address = {New York, NY},
publisher = {IEEE},
reportid = {FZJ-2015-05218},
pages = {699 - 701},
year = {2014},
abstract = {In this letter, we systematically investigate the impact of
gate length and channel orientation on the electrical
performance of tunneling field-effect transistors (TFETs).
We fabricate and characterize Si/SiGe heterostructure TFETs
with (p) -doped compressively strained Si0.5Ge0.5 source,
intrinsic Si channel, and (n) -doped Si drain. We observe a
linear relation of gate length, L $(_{mathrm$ {mathbf {g}}})
, and ON-current, I $(_{mathrm$ {{ON}}}) , which is the
first experimental proof of line tunneling occurring in a
TFET. TCAD simulations support our observations. After
forming gas annealing, short-channel TFETs exhibit different
I-V characteristics compared with long-channel devices due
to better passivation.},
cin = {PGI-9 / PGI-8-PT},
ddc = {620},
cid = {I:(DE-Juel1)PGI-9-20110106 / I:(DE-Juel1)PGI-8-PT-20110228},
pnm = {521 - Controlling Electron Charge-Based Phenomena
(POF3-521)},
pid = {G:(DE-HGF)POF3-521},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000338662100004},
doi = {10.1109/LED.2014.2320273},
url = {https://juser.fz-juelich.de/record/203232},
}