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@ARTICLE{Appenzeller:53199,
      author       = {Appenzeller, J. and Lin, Y.-M. and Knoch, J. and Chen, Z.
                      and Avouris, P.},
      title        = {{C}omparing {C}arbon {N}anotube {T}ransistors - {T}he
                      {I}deal {C}hoice: {A} {N}ovel {T}unneling {D}evice {D}esign},
      journal      = {IEEE Transactions on Electron Devices},
      volume       = {52},
      issn         = {0018-9383},
      reportid     = {PreJuSER-53199},
      pages        = {2568},
      year         = {2005},
      note         = {Record converted from VDB: 12.11.2012},
      abstract     = {Three different carbon nanotube (CN) field-effect
                      transistor (CNFET) designs are compared by simulation and
                      experiment. While a C-CNFET with a doping profile similar to
                      a "conventional" (referred to as C-CNFET in the following)
                      p-or n-MOSFET in principle exhibits superior device
                      characteristics when compared with a Schottky barrier CNFET,
                      we find that aggressively scaled C-CNFET devices suffer from
                      "charge pile-up" in the channel. This effect which is also
                      known to occur in floating body silicon transistors
                      deteriorates the C-CNFET off-state substantially and
                      ultimately limits the achievable on/off-current ratio. In
                      order to overcome this obstacle we explore the possibility
                      of using CNs as gate-controlled tunneling devices
                      (T-CNFETs). The T-CNFET benefits from a steep inverse
                      subthreshold slope and a well controlled off-state while at
                      the same time delivering high performance on-state
                      characteristics. According to our simulation, the T-CNFET is
                      the ideal transistor design for an ultrathin body
                      three-terminal device like the CNFET.},
      keywords     = {J (WoSType)},
      cin          = {ISG-1 / CNI},
      cid          = {I:(DE-Juel1)VDB41 / I:(DE-Juel1)VDB381},
      pnm          = {Materialien, Prozesse und Bauelemente für die Mikro- und
                      Nanoelektronik},
      pid          = {G:(DE-Juel1)FUEK252},
      shelfmark    = {Engineering, Electrical $\&$ Electronic / Physics, Applied},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000233682200006},
      doi          = {10.1109/TED.2005.859654},
      url          = {https://juser.fz-juelich.de/record/53199},
}