Hauptseite > Publikationsdatenbank > Comparison of three different architectures for active resistive memories > print |
001 | 56544 | ||
005 | 20180211170318.0 | ||
024 | 7 | _ | |2 DOI |a 10.1016/j.aeue.2006.06.004 |
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100 | 1 | _ | |a Mustafa, J. |b 0 |u FZJ |0 P:(DE-Juel1)VDB67695 |
245 | _ | _ | |a Comparison of three different architectures for active resistive memories |
260 | _ | _ | |c 2007 |a München |b Elsevier |
300 | _ | _ | |a 345 - 352 |
336 | 7 | _ | |a Journal Article |0 PUB:(DE-HGF)16 |2 PUB:(DE-HGF) |
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440 | _ | 0 | |a AEÜ : International Journal of Electronics and Communications |x 1434-8411 |0 17021 |v 61 |
500 | _ | _ | |a Record converted from VDB: 12.11.2012 |
520 | _ | _ | |a Resistive memory (RRAM) is one of the strong emerging technologies in modern memory field. This type of memories has the potential to be the replacement of several current memory types. As any new technology, RRAM brings new challenges concerning technology and design. This work discusses some aspects concerning the design of active resistive memories and compares three possible memory architectures. (C) 2006 Elsevier GmbH. All rights reserved. |
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653 | 2 | 0 | |2 Author |a hysteretic resistive elements |
653 | 2 | 0 | |2 Author |a RRAM |
653 | 2 | 0 | |2 Author |a memory architecture |
700 | 1 | _ | |a Rüdiger, A. |b 1 |u FZJ |0 P:(DE-Juel1)VDB26957 |
700 | 1 | _ | |a Waser, R. |b 2 |u FZJ |0 P:(DE-Juel1)131022 |
773 | _ | _ | |0 PERI:(DE-600)2046900-7 |a 10.1016/j.aeue.2006.06.004 |g Vol. 61, p. 345 - 352 |p 345 - 352 |q 61<345 - 352 |t AEU - International Journal of Electronics and Communications |v 61 |x 1434-8411 |y 2007 |
856 | 7 | _ | |u http://dx.doi.org/10.1016/j.aeue.2006.06.004 |
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