Hauptseite > Publikationsdatenbank > Process modules for GeSn nanoelectronics with high Sn-contents > print

001     821186
005     20210129224821.0
020 _ _ |a 978-1-4673-8609-8
024 7 _ |a 10.1109/ULIS.2016.7440043
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037 _ _ |a FZJ-2016-06424
041 _ _ |a English
100 1 _ |a Schulte-Braucks, Christian
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111 2 _ |a 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
|c Vienna
|d 1/25/2016 - 1/27/2016
|w Austria
245 _ _ |a Process modules for GeSn nanoelectronics with high Sn-contents
260 _ _ |a [Piscataway, NJ]
|c 2016
|b IEEE
300 _ _ |a 24-27
336 7 _ |a CONFERENCE_PAPER
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520 _ _ |a In this paper we present a systematic study of GeSn n-FETs. First, process modules such as high-k metal gate stacks and NiGeSn - metallic contacts for use as source/drain contacts are characterized and discussed. GeSn alloys of different Sn content allow the study of the capacitance-voltage (CV) and contact characteristics of both direct and indirect bandgap semiconductors. We then present GeSn n-FET devices we have fabricated. The device characterization includes temperature dependent IV characteristics. As important step towards GeSn for tunnel-FET Ge0.87Sn0.13 tunnel-diodes with negative differential resistance at reduced temperature are shown. The present work provides a base for further optimization of GeSn FET and novel tunnel FET devices.
536 _ _ |a 521 - Controlling Electron Charge-Based Phenomena (POF3-521)
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700 1 _ |a Glass, S.
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700 1 _ |a Hofmann, E.
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700 1 _ |a Stange, D.
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700 1 _ |a von den Driesch, N.
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700 1 _ |a Zhao, Q. T.
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700 1 _ |a Buca, D.
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700 1 _ |a Mantl, S.
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700 1 _ |a Hartmann, J. M.
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700 1 _ |a Ikonic, Z.
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773 _ _ |a 10.1109/ULIS.2016.7440043
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