Contribution to a conference proceedings/Contribution to a book FZJ-2016-06424

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Process modules for GeSn nanoelectronics with high Sn-contents

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2016
IEEE [Piscataway, NJ]
ISBN: 978-1-4673-8609-8

2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), ViennaVienna, Austria, 5 Dec 2016 - 7 Dec 20162016-12-052016-12-07 [Piscataway, NJ] : IEEE 24-27 () [10.1109/ULIS.2016.7440043]

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Abstract: In this paper we present a systematic study of GeSn n-FETs. First, process modules such as high-k metal gate stacks and NiGeSn - metallic contacts for use as source/drain contacts are characterized and discussed. GeSn alloys of different Sn content allow the study of the capacitance-voltage (CV) and contact characteristics of both direct and indirect bandgap semiconductors. We then present GeSn n-FET devices we have fabricated. The device characterization includes temperature dependent IV characteristics. As important step towards GeSn for tunnel-FET Ge0.87Sn0.13 tunnel-diodes with negative differential resistance at reduced temperature are shown. The present work provides a base for further optimization of GeSn FET and novel tunnel FET devices.


Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2016
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 Record created 2016-11-18, last modified 2021-01-29



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