%0 Journal Article
%A Schulte-Braucks, Christian
%A Glass, S.
%A Hofmann, E.
%A Stange, D.
%A von den Driesch, N.
%A Hartmann, J. M.
%A Ikonic, Z.
%A Zhao, Q. T.
%A Buca, D.
%A Mantl, S.
%T Process modules for GeSn nanoelectronics with high Sn-contents
%J Solid state electronics
%V 128
%@ 0038-1101
%C Oxford [u.a.]
%I Pergamon, Elsevier Science
%M FZJ-2017-00076
%P 54 - 59
%D 2017
%X This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0–14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.
%F PUB:(DE-HGF)16
%9 Journal Article
%U <Go to ISI:>//WOS:000392680300010
%R 10.1016/j.sse.2016.10.024
%U https://juser.fz-juelich.de/record/825771