Journal Article FZJ-2017-00076

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Process modules for GeSn nanoelectronics with high Sn-contents

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2017
Pergamon, Elsevier Science Oxford [u.a.]

Solid state electronics 128, 54 - 59 () [10.1016/j.sse.2016.10.024]

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Abstract: This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0–14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.

Classification:

Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. JARA-FIT (JARA-FIT)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)
  2. E2SWITCH - Energy Efficient Tunnel FET Switches and Circuits (619509) (619509)

Appears in the scientific report 2017
Database coverage:
Medline ; Current Contents - Engineering, Computing and Technology ; Current Contents - Physical, Chemical and Earth Sciences ; Ebsco Academic Search ; IF < 5 ; JCR ; NationallizenzNationallizenz ; SCOPUS ; Science Citation Index ; Science Citation Index Expanded ; Thomson Reuters Master Journal List ; Web of Science Core Collection
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 Record created 2017-01-05, last modified 2021-01-29


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