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@ARTICLE{SchulteBraucks:825771,
author = {Schulte-Braucks, Christian and Glass, S. and Hofmann, E.
and Stange, D. and von den Driesch, N. and Hartmann, J. M.
and Ikonic, Z. and Zhao, Q. T. and Buca, D. and Mantl, S.},
title = {{P}rocess modules for {G}e{S}n nanoelectronics with high
{S}n-contents},
journal = {Solid state electronics},
volume = {128},
issn = {0038-1101},
address = {Oxford [u.a.]},
publisher = {Pergamon, Elsevier Science},
reportid = {FZJ-2017-00076},
pages = {54 - 59},
year = {2017},
abstract = {This paper systematically studies GeSn n-FETs, from
individual process modules to a complete device. High-k gate
stacks and NiGeSn metallic contacts for source and drain are
characterized in independent experiments. To study both
direct and indirect bandgap semiconductors, a range of
0–14.5 $at.\%$ Sn-content GeSn alloys are investigated.
Special emphasis is placed on capacitance-voltage (C-V)
characteristics and Schottky-barrier optimization. GeSn
n-FET devices are presented including temperature dependent
I-V characteristics. Finally, as an important step towards
implementing GeSn in tunnel-FETs, negative differential
resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at
cryogenic temperatures. The present work provides a base for
further optimization of GeSn FETs and novel tunnel FET
devices.},
cin = {PGI-9 / JARA-FIT},
ddc = {530},
cid = {I:(DE-Juel1)PGI-9-20110106 / $I:(DE-82)080009_20140620$},
pnm = {521 - Controlling Electron Charge-Based Phenomena
(POF3-521) / E2SWITCH - Energy Efficient Tunnel FET Switches
and Circuits (619509)},
pid = {G:(DE-HGF)POF3-521 / G:(EU-Grant)619509},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000392680300010},
doi = {10.1016/j.sse.2016.10.024},
url = {https://juser.fz-juelich.de/record/825771},
}