Hauptseite > Publikationsdatenbank > Process modules for GeSn nanoelectronics with high Sn-contents > print

001     825771
005     20210129225427.0
024 7 _ |a 10.1016/j.sse.2016.10.024
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100 1 _ |a Schulte-Braucks, Christian
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245 _ _ |a Process modules for GeSn nanoelectronics with high Sn-contents
260 _ _ |a Oxford [u.a.]
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520 _ _ |a This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0–14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.
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536 _ _ |a E2SWITCH - Energy Efficient Tunnel FET Switches and Circuits (619509)
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700 1 _ |a Glass, S.
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700 1 _ |a Hofmann, E.
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700 1 _ |a Stange, D.
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700 1 _ |a von den Driesch, N.
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700 1 _ |a Hartmann, J. M.
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700 1 _ |a Ikonic, Z.
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700 1 _ |a Zhao, Q. T.
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700 1 _ |a Buca, D.
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700 1 _ |a Mantl, S.
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773 _ _ |a 10.1016/j.sse.2016.10.024
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