Journal Article

FZJ-2017-04737

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Using file system counters in modelling parallel I/O architectures

El Sayed Mohamed, S.FZJ* ; Bolten, M. ; Pleiter, D.FZJ*

2017
ACM New York, NY

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Please use a persistent id in citations: doi:10.1145/3041710.3041716

Abstract: Keeping compute and I/O performance balanced is a major challenge for future cost-efficient HPC systems. Several architectural concepts and new technologies allow to address this challenge, however at the price of higher complexity. As a result, the need emerges to simulate these architectural concepts and new technologies to predict their impact on the overall performance. In this paper we propose a particular approach to explore the design space using event simulation models that take I/O server-side performance counters as input. In this way large quantities of real-life data measured over a large number of applications can be used to explore architectural modifications. We apply our approach using data collected by a GPFS file system serving a petascale Blue Gene/P installation.

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Contributing Institute(s):

1. Jülich Supercomputing Center (JSC)

Research Program(s):

1. 513 - Supercomputer Facility (POF3-513) (POF3-513)

Appears in the scientific report 2017

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Database coverage:
SCOPUS

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