Journal Article

FZJ-2017-05213

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png First results of the front-end ASIC for the strip detector of the PANDA MVD

Quagli, T. (Corresponding author) ; Brinkmann, K.-T. ; Calvo, D. ; Pietro, V. D. ; Lai, A.FZJ* ; Riccardi, A. ; Ritman, J.FZJ* ; Rivetti, A. ; Rolo, M. D. ; Stockmanns, T.FZJ* ; Wheadon, R. ; Zambanini, A.FZJ*

2017
Inst. of Physics London

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Please use a persistent id in citations: doi:10.1088/1748-0221/12/03/C03063

Abstract: PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

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Contributing Institute(s):

1. Experimentelle Hadronstruktur (IKP-1)
2. Zentralinstitut für Elektronik (ZEA-2)

Research Program(s):

1. 632 - Detector technology and systems (POF3-632) (POF3-632)
2. 6G12 - FAIR (POF3-624) (POF3-624)

Appears in the scientific report 2017

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Database coverage:
; Current Contents - Physical, Chemical and Earth Sciences ; IF < 5 ; JCR ; Nationallizenz ; SCOPUS ; Science Citation Index Expanded ; Thomson Reuters Master Journal List ; Web of Science Core Collection

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