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| Hauptseite > Publikationsdatenbank > Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions > print |
| Hauptseite > Publikationsdatenbank > Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions > print |
| 001 | 859060 | ||
| 005 | 20210130000150.0 | ||
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| 100 | 1 | _ | |a Narimani, Keyvan |0 P:(DE-Juel1)164261 |b 0 |u fzj |
| 245 | _ | _ | |a Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions |
| 260 | _ | _ | |a Basel |c 2018 |b MDPI |
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| 520 | _ | _ | |a In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages. The subthreshold swing (SS) at room temperature shows an average of 76 mV/dec over 4 orders of drain current Id from 5 × 10−6 to 5 × 10−2 µA/µm. Optimized devices also show excellent current saturation, an important feature for analog performance |
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| 700 | 1 | _ | |a Trellenkamp, Stefan |0 P:(DE-Juel1)128856 |b 1 |u fzj |
| 700 | 1 | _ | |a Tiedemann, Andreas |0 P:(DE-Juel1)128639 |b 2 |u fzj |
| 700 | 1 | _ | |a Mantl, Siegfried |0 P:(DE-Juel1)128609 |b 3 |u fzj |
| 700 | 1 | _ | |a Zhao, Qing-Tai |0 P:(DE-Juel1)128649 |b 4 |e Corresponding author |
| 773 | _ | _ | |a 10.3390/app8050670 |g Vol. 8, no. 5, p. 670 - |0 PERI:(DE-600)2704225-X |n 5 |p 670 - |t Applied Sciences |v 8 |y 2018 |x 2076-3417 |
| 856 | 4 | _ | |y OpenAccess |u https://juser.fz-juelich.de/record/859060/files/applsci-08-00670-v3.pdf |
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