Home > Publications database > Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions |
Journal Article | FZJ-2019-00011 |
; ; ; ;
2018
MDPI
Basel
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Please use a persistent id in citations: http://hdl.handle.net/2128/21156 doi:10.3390/app8050670
Abstract: In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages. The subthreshold swing (SS) at room temperature shows an average of 76 mV/dec over 4 orders of drain current Id from 5 × 10−6 to 5 × 10−2 µA/µm. Optimized devices also show excellent current saturation, an important feature for analog performance
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