Journal Article

FZJ-2019-00034

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Experimental Investigation of ${C}$ – ${V}$ Characteristics of Si Tunnel FETs

Liu, C.FZJ* ; Glass, S.FZJ* ; Luong, G. V.FZJ* ; Narimani, K.FZJ* ; Han, Q.FZJ* ; Tiedemann, A.FZJ* ; Fox, A.FZJ* ; Yu, W. ; Wang, X. ; Mantl, S.FZJ* ; Zhao, Q.-T. (Corresponding author)FZJ*

2017
IEEE New York, NY

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Please use a persistent id in citations: doi:10.1109/LED.2017.2695193

Abstract: This letter presents an experimental capacitance-voltage C-V analysis for Si p-tunnel FETs (TFETs) fabricated on ultrathin body at various frequencies and temperatures. The capacitance distribution in TFETs is quite different compared with MOSFETs, due to different inversion charges partitioning between source and drain. Contrary to predictions from simulations, we provide experimental evidence for the first time that the contribution of the gate-to-source capacitance C gs to the total gate capacitance is much larger than expected, and even comparable to the gate-to-drain capacitance C gd at higher V ds and V g . Comparable values of C gs and C gd would imply that the Miller capacitance effect in TFETs-based circuits is less pronounced as predicted in simulations.

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Contributing Institute(s):

1. Halbleiter-Nanoelektronik (PGI-9)

Research Program(s):

1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2018

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Database coverage:
Clarivate Analytics Master Journal List ; Current Contents - Engineering, Computing and Technology ; IF < 5 ; JCR ; SCOPUS ; Science Citation Index ; Science Citation Index Expanded ; Web of Science Core Collection

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