TY  - JOUR
AU  - Liu, Chang
AU  - Glass, Stefan
AU  - Luong, Gia Vinh
AU  - Narimani, Keyvan
AU  - Han, Qinghua
AU  - Tiedemann, Andreas
AU  - Fox, Alfred
AU  - Yu, Wenjie
AU  - Wang, Xi
AU  - Mantl, Siegfried
AU  - Zhao, Qing-Tai
TI  - Experimental Investigation of ${C}$ – ${V}$ Characteristics of Si Tunnel FETs
JO  - IEEE electron device letters
VL  - 38
IS  - 6
SN  - 1558-0563
CY  - New York, NY
PB  - IEEE
M1  - FZJ-2019-00034
SP  - 818 - 821
PY  - 2017
AB  - This letter presents an experimental capacitance-voltage C-V analysis for Si p-tunnel FETs (TFETs) fabricated on ultrathin body at various frequencies and temperatures. The capacitance distribution in TFETs is quite different compared with MOSFETs, due to different inversion charges partitioning between source and drain. Contrary to predictions from simulations, we provide experimental evidence for the first time that the contribution of the gate-to-source capacitance C gs to the total gate capacitance is much larger than expected, and even comparable to the gate-to-drain capacitance C gd at higher V ds and V g . Comparable values of C gs and C gd would imply that the Miller capacitance effect in TFETs-based circuits is less pronounced as predicted in simulations.
LB  - PUB:(DE-HGF)16
UR  - <Go to ISI:>//WOS:000402146300031
DO  - DOI:10.1109/LED.2017.2695193
UR  - https://juser.fz-juelich.de/record/859083
ER  -