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@INPROCEEDINGS{Narimani:859085,
      author       = {Narimani, K. and Glass, S. and Rieger, T. and Bernardy, P.
                      and von den Driesch, N. and Mantl, S. and Zhao, Q. T.},
      title        = {{S}ilicon tunnel {FET} with average subthreshold slope of
                      55m{V}/dec at low drain currents},
      publisher    = {IEEE},
      reportid     = {FZJ-2019-00036},
      pages        = {1-4},
      year         = {2017},
      abstract     = {In this paper we present a silicon tunnel FET based on
                      line-tunneling to achieve better subthreshold performance.
                      It is shown that the device achieves I on /I off ratio of
                      5×10 4 considering I on (V on = V Ioff -0.5V) = 0.8×10 -8
                      μA/μm and an average SS of 55mV/dec over two orders of
                      magnitude of I d . Furthermore, the analog figures of merit
                      have been calculated and show that the transconductance
                      efficiency g m /I d beats the MOSFET performance at lower
                      currents.},
      month         = {Apr},
      date          = {2017-04-03},
      organization  = {2017 Joint International EUROSOI
                       Workshop and International Conference
                       on Ultimate Integration on Silicon
                       (EUROSOI-ULIS), Athens (Greece), 3 Apr
                       2017 - 5 Apr 2017},
      cin          = {PGI-9},
      cid          = {I:(DE-Juel1)PGI-9-20110106},
      pnm          = {521 - Controlling Electron Charge-Based Phenomena
                      (POF3-521)},
      pid          = {G:(DE-HGF)POF3-521},
      typ          = {PUB:(DE-HGF)8},
      doi          = {10.1109/ULIS.2017.7962605},
      url          = {https://juser.fz-juelich.de/record/859085},
}