Contribution to a conference proceedings/Contribution to a book FZJ-2019-00037

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Analog and RF analysis of gate all around silicon nanowire MOSFETs

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2017
IEEE [Piscataway, NJ]
ISBN: 978-1-5090-5313-1 , 9781509053148 (print)

2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), AthensAthens, Greece, 3 Apr 2017 - 5 Apr 20172017-04-032017-04-05 [Piscataway, NJ] : IEEE 1-4 () [10.1109/ULIS.2017.7962575]

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Abstract: Gate all around (GAA) nanowire MOSFETs with gate length of 130 nm were fabricated on SOI wafers. The analog performance was analyzed in terms of transconductance, output conductance, voltage gain, Early voltage and transconductance efficiency. The RF characterization showed relatively low cutoff frequency and maximum oscillation frequency. Small-signal parameters are extracted using cold FET method combined with an optimization procedure called Artificial Bee Colony (ABC) method. It proves that large parasitic capacitance and high RF output conductance are the main reasons for the degraded RF performance.


Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. Helmholtz - Nanofacility (HNF)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2018
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 Record created 2019-01-03, last modified 2021-01-30


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