Contribution to a conference proceedings/Contribution to a book

FZJ-2019-00526

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Three Dirac operators on two architectures with one piece of code and no hassle

Durr, S. (Corresponding author)FZJ*

2018
SISSA Trieste

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Please use a persistent id in citations: http://hdl.handle.net/2128/21382

Abstract: A simple minded approach to implement three discretizations of the Dirac operator (staggered, Wilson, Brillouin) on two architectures (KNL and core i7) is presented. The idea is to use a high-level compiler along with OpenMP parallelization and SIMD pragmas, but to stay away from cache-line optimization and/or assembly-tuning. The implementation is for N_v right-hand-sides, and this extra index is used to fill the SIMD pipeline. On one KNL node single precision performance figures for N_c=3, N_v=12 read 475 Gflop/s, 345 Gflop/s, and 790 Gflop/s for the three discretization schemes, respectively.

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Contributing Institute(s):

1. Jülich Supercomputing Center (JSC)

Research Program(s):

1. 511 - Computational Science and Mathematical Methods (POF3-511) (POF3-511)

Appears in the scientific report 2018

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