%0 Journal Article
%A Bhattacharjee, Debjyoti
%A Siemon, Anne
%A Linn, Eike
%A Menzel, Stephan
%A Chattopadhyay, Anupam
%T Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays
%J ACM journal on emerging technologies in computing systems
%V 14
%N 2
%@ 1550-4832
%C New York, NY
%I Association for Computing Machinery
%M FZJ-2019-00889
%P Article No. 30 
%D 2018
%X Low operating voltage, high storage density, non-volatile storage capabilities, and relative low access latencies have popularized memristive devices as storage devices. Memristors can be ideally used for in-memory computing in the form of hybrid CMOS nano-crossbar arrays. In-memory serial adders have been theoretically and experimentally proven for crossbar arrays. To harness the parallelism of memristive arrays, parallel-prefix adders can be effective. In this work, a novel mapping scheme for in-memory Kogge-Stone adder has been presented. The number of cycles increases logarithmically with the bit width N of the operands, i.e., O(log2N), and the device count is 5N. We verify the correctness of the proposed scheme by means of TaO× device model-based memristive simulations. We compare the proposed scheme with other proposed schemes in terms of number of cycle and number of devices
%F PUB:(DE-HGF)16
%9 Journal Article
%U <Go to ISI:>//WOS:000449159400017
%R 10.1145/3183352
%U https://juser.fz-juelich.de/record/860103