| Home > Publications database > Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays |
| Journal Article | FZJ-2019-00889 |
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2018
Association for Computing Machinery
New York, NY
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Please use a persistent id in citations: doi:10.1145/3183352
Abstract: Low operating voltage, high storage density, non-volatile storage capabilities, and relative low access latencies have popularized memristive devices as storage devices. Memristors can be ideally used for in-memory computing in the form of hybrid CMOS nano-crossbar arrays. In-memory serial adders have been theoretically and experimentally proven for crossbar arrays. To harness the parallelism of memristive arrays, parallel-prefix adders can be effective. In this work, a novel mapping scheme for in-memory Kogge-Stone adder has been presented. The number of cycles increases logarithmically with the bit width N of the operands, i.e., O(log2N), and the device count is 5N. We verify the correctness of the proposed scheme by means of TaO× device model-based memristive simulations. We compare the proposed scheme with other proposed schemes in terms of number of cycle and number of devices
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