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001     860103
005     20210130000440.0
024 7 _ |a 10.1145/3183352
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024 7 _ |a 1550-4832
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024 7 _ |a 1550-4840
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024 7 _ |a WOS:000449159400017
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037 _ _ |a FZJ-2019-00889
082 _ _ |a 004
100 1 _ |a Bhattacharjee, Debjyoti
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245 _ _ |a Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays
260 _ _ |a New York, NY
|c 2018
|b Association for Computing Machinery
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520 _ _ |a Low operating voltage, high storage density, non-volatile storage capabilities, and relative low access latencies have popularized memristive devices as storage devices. Memristors can be ideally used for in-memory computing in the form of hybrid CMOS nano-crossbar arrays. In-memory serial adders have been theoretically and experimentally proven for crossbar arrays. To harness the parallelism of memristive arrays, parallel-prefix adders can be effective. In this work, a novel mapping scheme for in-memory Kogge-Stone adder has been presented. The number of cycles increases logarithmically with the bit width N of the operands, i.e., O(log2N), and the device count is 5N. We verify the correctness of the proposed scheme by means of TaO× device model-based memristive simulations. We compare the proposed scheme with other proposed schemes in terms of number of cycle and number of devices
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700 1 _ |a Linn, Eike
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700 1 _ |a Menzel, Stephan
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700 1 _ |a Chattopadhyay, Anupam
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773 _ _ |a 10.1145/3183352
|g Vol. 14, no. 2, p. 1 - 14
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|t ACM journal on emerging technologies in computing systems
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