% IMPORTANT: The following is UTF-8 encoded. This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.
@ARTICLE{Kutovyi:861295,
author = {Kutovyi, Yurii and Zadorozhnyi, Ihor and Handziuk,
Volodymyr and Hlukhova, Hanna and Boichuk, Nazarii and
Petrychuk, Mykhaylo and Vitusevich, Svetlana},
title = {{T}emperature-{D}ependent {N}oise and {T}ransport in
{S}ilicon {T}wo-{L}ayer {N}anowire {FET}s},
journal = {Physica status solidi / B Basic research B},
volume = {256},
number = {3},
issn = {0370-1972},
address = {Weinheim},
publisher = {Wiley-VCH},
reportid = {FZJ-2019-01792},
pages = {1800636},
year = {2019},
abstract = {Silicon two‐layer (TL) nanowire (NW) field‐effect
transistors (FETs) are fabricated by applying a
CMOS‐compatible top‐down approach to silicon on
insulator (SOI) wafers with additionally epitaxially grown
silicon layers. Transport and noise properties of fabricated
structures with p‐type conductivity are studied in a wide
temperature range (100–300 K). A random telegraph signal
(RTS) noise as a special case of trapping‐detrapping
processes is registered as a dominant noise component at
room temperature. A shift of the characteristic corner
(rollover) frequency of the RTS noise to lower frequencies
with temperature decreasing is observed. By performing
analysis of temperature‐dependent low‐frequency noise,
the activation energy and hole capture cross section of a
single trap responsible for the RTS noise are estimated to
be (0.29 ± 0.02 eV) and (2.22 ± 0.15)
×10−18 cm2, respectively. Obtained values suggest that
the trap can be attributed to a vacancy‐boron complex. At
the temperature below 200 K fabricated devices demonstrate
a clear generation‐recombination noise with power spectral
density proportional to 1/f 3/2. Such noise behavior
provides the evidence of diffusion‐assisted processes in
two‐layer nanowire structures. This confirms the
contribution of high‐doped top silicon layer to the
transistor transport properties.},
cin = {ICS-8},
ddc = {530},
cid = {I:(DE-Juel1)ICS-8-20110106},
pnm = {523 - Controlling Configuration-Based Phenomena (POF3-523)},
pid = {G:(DE-HGF)POF3-523},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000473612400023},
doi = {10.1002/pssb.201800636},
url = {https://juser.fz-juelich.de/record/861295},
}