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000868213 037__ $$aFZJ-2019-06785
000868213 041__ $$aEnglish
000868213 1001_ $$0P:(DE-Juel1)145478$$aHerten, Andreas$$b0$$eCorresponding author$$ufzj
000868213 1112_ $$aInternational Conference for High Performance Computing, Networking, Storage and Analysis (The Supercomputing Conference)$$cDenver, CO$$d2019-11-18 - 2019-11-18$$gSC19$$wUSA
000868213 245__ $$aApplication Porting and Optimization on GPU-Accelerated POWER Architectures
000868213 260__ $$c2019
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000868213 520__ $$aThe POWER processor has re-emerged as a technology for supercomputer architectures. One major reason is the tight integration of processor and GPU accelerator through the NVLink technology. Two major sites in the US, ORNL and LLNL, deployed their pre-exascale systems based on this new architecture (Summit and Sierra, respectively).This tutorial gives an opportunity to obtain in-depth knowledge and experience with GPU-accelerated POWER nodes. It focuses on porting applications to a single node and covers the topics architecture, compilers, performance analysis and tuning, and multi-GPU programming. The tutorial includes an overview of the NVLink-based node architectures, lectures on first-hand experience in porting to this architecture, and exercises using tools to focus on performance.
000868213 536__ $$0G:(DE-HGF)POF3-511$$a511 - Computational Science and Mathematical Methods (POF3-511)$$cPOF3-511$$fPOF III$$x0
000868213 536__ $$0G:(DE-HGF)POF3-513$$a513 - Supercomputer Facility (POF3-513)$$cPOF3-513$$fPOF III$$x1
000868213 7001_ $$0P:(DE-Juel1)144441$$aPleiter, Dirk$$b1$$ufzj
000868213 7001_ $$0P:(DE-HGF)0$$aWagner, Mathias$$b2
000868213 7001_ $$0P:(DE-HGF)0$$aHagleitner, Christoph$$b3
000868213 7001_ $$0P:(DE-HGF)0$$aRavindar, Archana$$b4
000868213 7001_ $$0P:(DE-HGF)0$$aPapatheodore, Tom$$b5
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/1-Hardware_Architecture.pdf$$yRestricted
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/2-Performance_Counters.pdf$$yRestricted
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/3-Compiler_Optimizations.pdf$$yRestricted
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/4-Volta_GPU_Architecture.pdf$$yRestricted
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/5-Multi_GPU_Programming.pdf$$yRestricted
000868213 8564_ $$uhttps://juser.fz-juelich.de/record/868213/files/6-Best_Practices.pdf$$yRestricted
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000868213 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)145478$$aForschungszentrum Jülich$$b0$$kFZJ
000868213 9101_ $$0I:(DE-588b)5008462-8$$6P:(DE-Juel1)144441$$aForschungszentrum Jülich$$b1$$kFZJ
000868213 9131_ $$0G:(DE-HGF)POF3-511$$1G:(DE-HGF)POF3-510$$2G:(DE-HGF)POF3-500$$3G:(DE-HGF)POF3$$4G:(DE-HGF)POF$$aDE-HGF$$bKey Technologies$$lSupercomputing & Big Data$$vComputational Science and Mathematical Methods$$x0
000868213 9131_ $$0G:(DE-HGF)POF3-513$$1G:(DE-HGF)POF3-510$$2G:(DE-HGF)POF3-500$$3G:(DE-HGF)POF3$$4G:(DE-HGF)POF$$aDE-HGF$$bKey Technologies$$lSupercomputing & Big Data$$vSupercomputer Facility$$x1
000868213 9141_ $$y2019
000868213 920__ $$lyes
000868213 9201_ $$0I:(DE-Juel1)JSC-20090406$$kJSC$$lJülich Supercomputing Center$$x0
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