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@MISC{Herten:868213,
author = {Herten, Andreas and Pleiter, Dirk and Wagner, Mathias and
Hagleitner, Christoph and Ravindar, Archana and
Papatheodore, Tom},
title = {{A}pplication {P}orting and {O}ptimization on
{GPU}-{A}ccelerated {POWER} {A}rchitectures},
reportid = {FZJ-2019-06785},
year = {2019},
abstract = {The POWER processor has re-emerged as a technology for
supercomputer architectures. One major reason is the tight
integration of processor and GPU accelerator through the
NVLink technology. Two major sites in the US, ORNL and LLNL,
deployed their pre-exascale systems based on this new
architecture (Summit and Sierra, respectively).This tutorial
gives an opportunity to obtain in-depth knowledge and
experience with GPU-accelerated POWER nodes. It focuses on
porting applications to a single node and covers the topics
architecture, compilers, performance analysis and tuning,
and multi-GPU programming. The tutorial includes an overview
of the NVLink-based node architectures, lectures on
first-hand experience in porting to this architecture, and
exercises using tools to focus on performance.},
month = {Nov},
date = {2019-11-18},
organization = {International Conference for High
Performance Computing, Networking,
Storage and Analysis (The
Supercomputing Conference), Denver, CO
(USA), 18 Nov 2019 - 18 Nov 2019},
subtyp = {After Call},
cin = {JSC},
cid = {I:(DE-Juel1)JSC-20090406},
pnm = {511 - Computational Science and Mathematical Methods
(POF3-511) / 513 - Supercomputer Facility (POF3-513)},
pid = {G:(DE-HGF)POF3-511 / G:(DE-HGF)POF3-513},
typ = {PUB:(DE-HGF)17},
url = {https://juser.fz-juelich.de/record/868213},
}