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Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors
Armejach, A. ; Brank, B.FZJ* ; Cortina, J. ; Dolique, F. ; Hayes, T. ; Ho, N.FZJ* ; Lagadec, P.-A. ; Lemaire, R. ; Lopez-Paradis, G. ; Marliac, L. ; Moreto, M. ; Marcuello, P. ; Pleiter, D. (Corresponding author)FZJ* ; Tan, X. ; Derradji, S.
2021
20212021 Design, Automation & Test in Europe Conference & Exhibition (DATE) : [Proceedings] - IEEE, 2021. - ISBN 978-3-9819263-5-4 - doi:10.23919/DATE51398.2021.9474093
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), GrenobleGrenoble, France, 1 Feb 2021 - 5 Feb 20212021-02-012021-02-05
136-141 (2021) [10.23919/DATE51398.2021.9474093]2021
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Please use a persistent id in citations: doi:10.23919/DATE51398.2021.9474093
Contributing Institute(s):
- Jülich Supercomputing Center (JSC)
Research Program(s):
- 5122 - Future Computing & Big Data Systems (POF4-512) (POF4-512)
- Mont-Blanc 2020 - Mont-Blanc 2020, European scalable, modular and power efficient HPC processor (779877) (779877)
Appears in the scientific report
2021