000916931 001__ 916931
000916931 005__ 20250129092507.0
000916931 0247_ $$2Handle$$a2128/33753
000916931 037__ $$aFZJ-2023-00199
000916931 041__ $$aEnglish
000916931 1001_ $$0P:(DE-Juel1)174088$$aOtten, Rene$$b0$$eCorresponding author$$ufzj
000916931 1112_ $$a5th International Conference on  Spin-Based Quantum Information Processing (Spin Qubit 5)$$cPontresina$$d2022-09-05 - 2022-09-09$$wSwitzerland
000916931 245__ $$aQubit Bias using a CMOS DAC at mK Temperatures
000916931 260__ $$c2022
000916931 3367_ $$033$$2EndNote$$aConference Paper
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000916931 502__ $$cRWTH Aachen University
000916931 520__ $$aScaling up a quantum processor to tackle real-world problems requires qubit numbers in the millions. Scalable semiconductor-based architectures have been proposed, many of them relying on integrated control instead of room-temperature electronics. However, it has not yet been shown that this can be achieved. For developing a high-density, low-cost wiring solution, it is highly advantageous for the electronics to be placed at the same temperature as the qubit chip. Therefore, tight integration of the qubit chip with ultra low power complementary  metal–oxide–semiconductor  (CMOS)  electronics presents a promising route. We demonstrate DC biasing qubit electrodes using a custom-designed 65nm CMOS capacitive digital-to-analog converter (DAC) operating on the mixing chamber of a dilution refrigerator below 45 mK. Our chip features a complete proof of principle solution including interface, DAC memory and logic, the capacitive DAC, and sample-and-hold structures to provide voltages for multiple qubit gates. The bias-DAC (CryoDAC) is combined with the qubit using a silicon interposer chip, enabling flexible routing and  tight integration. Voltage stability,  noise  performance, and temperature are benchmarked using the qubit chip. Our results  indicate  that  qubit  bias  at  cryogenic  temperatures with a power consumption of 4 nW/ch is feasible with this approach. They validate the potential of very low power qubit biasing using highly integrated circuits whose connectivity requirements do not increase with the number of qubits.
000916931 536__ $$0G:(DE-HGF)POF4-5221$$a5221 - Advanced Solid-State Qubits and Qubit Systems (POF4-522)$$cPOF4-522$$fPOF IV$$x0
000916931 536__ $$0G:(DE-Juel1)BMBF-13N16149$$aBMBF-13N16149 - QSolid (BMBF-13N16149)$$cBMBF-13N16149$$x1
000916931 7001_ $$0P:(DE-Juel1)180854$$aSchreckenberg, Lea$$b1$$ufzj
000916931 7001_ $$0P:(DE-Juel1)171680$$aVliex, Patrick$$b2$$ufzj
000916931 7001_ $$0P:(DE-HGF)0$$aRitzmann, Julian$$b3
000916931 7001_ $$0P:(DE-HGF)0$$aLudwig, Arne$$b4
000916931 7001_ $$0P:(DE-HGF)0$$aWieck, Andreas D.$$b5
000916931 7001_ $$0P:(DE-Juel1)172019$$aBluhm, Hendrik$$b6$$ufzj
000916931 8564_ $$uhttps://juser.fz-juelich.de/record/916931/files/Poster.pdf$$yOpenAccess
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000916931 9131_ $$0G:(DE-HGF)POF4-522$$1G:(DE-HGF)POF4-520$$2G:(DE-HGF)POF4-500$$3G:(DE-HGF)POF4$$4G:(DE-HGF)POF$$9G:(DE-HGF)POF4-5221$$aDE-HGF$$bKey Technologies$$lNatural, Artificial and Cognitive Information Processing$$vQuantum Computing$$x0
000916931 9141_ $$y2022
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000916931 9201_ $$0I:(DE-Juel1)PGI-11-20170113$$kPGI-11$$lJARA Institut Quanteninformation$$x0
000916931 9201_ $$0I:(DE-Juel1)ZEA-2-20090406$$kZEA-2$$lZentralinstitut für Elektronik$$x1
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