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2025-12-22
10:05

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2025-12-22
10:00

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2025-12-22
09:56

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2025-12-22
09:09

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2025-12-19
16:17
OpenAccess [FZJ-2025-05766] Conference Presentation (After Call)

A scaling-friendly memristor-based leaky integrate-and-fire circuit in a TSMC 28nm process technology
8th International Conference on Memristive Materials, Devices & Systems, MEMRISYS 2025, EdinburghEdinburgh, UK, 13 Oct 2025 - 16 Oct 20252025-10-132025-10-16 [10.34734/FZJ-2025-05766]
Spiking neural networks mimic the way the human brain processes data and excel in efficiency. With the advent of the memristor, foundations are laid for scalable and low-power integrated electronic implementations. [...]
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2025-12-19
16:04
arXiv [FZJ-2025-05765] Preprint
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FPGA-Based Real-Time Waveform Classification
[arXiv:2511.05479]
For self-triggered readout of SiPM sum signals, a waveform classification can aid a simple threshold trigger to reliably extract calorimetric particle hit information online at an early stage and thus reduce the volume of transmitted data. Typically, the ADC data acquisition is based on FPGAs for edge data processing. [...]
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2025-12-19
16:02
arXiv [FZJ-2025-05764] Preprint
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2T1R Regulated Memristor Conductance Control Array Architecture for Neuromorphic Computing using 28nm CMOS Technology
[arXiv:2505.12830]
Memristors are promising devices for scalable and low power, in-memory computing to improve the energy efficiency of a rising computational demand. The crossbar array architecture with memristors is used for vector matrix multiplication (VMM) and acts as kernels in neuromorphic computing. [...]
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2025-12-19
15:57
OpenAccess [FZJ-2025-05763] Contribution to a conference proceedings
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Modeling Chiplet-to-Chiplet (C2C) Communication for Chiplet-based Co-Design
ISC High Performance 2025 Research Paper Proceedings (40th International Conference), HamburgHamburg, Germany, 10 Jun 2025 - 13 Jun 20252025-06-102025-06-13 IEEE 11 pp. () [10.23919/ISC.2025.11018303]
Chiplet-based processor design, which combines small dies called chiplets to form a larger chip, enables scalable designs at economical costs. This trend has received high attention such that standards for chiplet design have rapidly established, including packaging, protocols, and Chiplet-to-Chiplet (C2C) interfaces. [...]
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2025-12-19
15:50
arXiv [FZJ-2025-05762] Preprint
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Scalable 28nm IC implementation of coupled oscillator network featuring tunable topology and complexity
[arXiv:2505.10248]
Integrated circuit implementations of coupled oscillator networks have recently gained increased attention. The focus is usually on using these networks for analogue computing, for example for solving computational optimization tasks. [...]
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2025-12-19
14:31
[FZJ-2025-05757] Poster (Invited)
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Optimization of Separators in Aluminum-Ion Batteries: Influence of material properties and pore structure on the performance and lifetime
7th ELECTRA Symposium, RWTH AachenJülich, RWTH Aachen, Germany, 19 May 2025 - 20 May 20252025-05-192025-05-20

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