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Talk (non-conference) (Invited) | FZJ-2025-03294 |
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2025
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Please use a persistent id in citations: doi:10.34734/FZJ-2025-03294
Abstract: As quantum processors scale towards practical utility, the classical electronics responsible for qubit control and readout face increasing demands in terms of integration density, power efficiency, and thermal compatibility. This presentation will examine the function of cryogenic CMOS (cryo-CMOS) circuits as a pivotal facilitator for scalable quantum computing architectures, with a particular emphasis on systems functioning at deep cryogenic temperatures, reaching the milli-Kelvin range. The presentation will discuss architectural considerations, device behavior anomalies, and mixed-signal design trade-offs encountered in the development of cryo-CMOS interfaces for superconducting and spin-based qubit platforms. The emphasis will be placed on practical lessons learned from multiple design iterations and experimental campaigns. Attendees will gain insight into the principles that govern the successful integration of CMOS technology into the quantum realm, as well as the pitfalls to be avoided. This includes reflections on the limits of conventional design flows, where intuition built at room temperature may no longer hold, and where new metrics of performance must be considered.
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