Contribution to a conference proceedings/Journal Article

FZJ-2013-03215

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png GOSSIPO-4: an array of high resolution TDCs with a PLL control

Zappon, F. (Corresponding author) ; Beuzekom, M. v. ; Gromov, V. ; Kluit, R. ; Fang, X. ; Kruth, A.ZEA-2*

2012
Inst. of Physics London

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Please use a persistent id in citations: doi:10.1088/1748-0221/7/01/C01081

Abstract: GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed to test a set of new features that will be used in TimePix3, including a 8 pixel structure sharing one fast oscillator with a new topology, a PLL to provide the control voltage to the oscillators, a custom fast counter and a new small-area cell library.

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Contributing Institute(s):

1. Zentralinstitut für Elektronik (ZEA-2)

Research Program(s):

1. 899 - ohne Topic (POF2-899) (POF2-899)

Appears in the scientific report 2013

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Database coverage:
; Current Contents - Social and Behavioral Sciences ; JCR ; Nationallizenz ; SCOPUS ; Science Citation Index Expanded ; Thomson Reuters Master Journal List ; Web of Science Core Collection

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