Journal Article PreJuSER-18865

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Etching titanium nitride gate stacked on high-k dielectric

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2011
Elsevier [S.l.] @

Microelectronic engineering 88, 2541 - 2543 () [10.1016/j.mee.2011.02.049]

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Abstract: In this work a high-kappa-metal-gate patterning-process using ICP-RIE is proposed. The dry-etching is low on plasma-induced damages and highly selective to the dielectric due to its low bias-voltage. A self aligned removal of the high-kappa-layer is also applied to complete the gate-stack patterning. This procedure may substitute replacement-gate-processes for high-kappa-metal-gate CMOS-transistors. (C) 2011 Elsevier B.V. All rights reserved.

Keyword(s): J ; Titanium nitride (auto) ; Reactive ion etching (auto) ; Gadolinium-scandate (auto) ; High-kappa-metal-gate (auto)


Note: Record converted from VDB: 12.11.2012

Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. Jülich-Aachen Research Alliance - Fundamentals of Future Information Technology (JARA-FIT)
Research Program(s):
  1. Grundlagen für zukünftige Informationstechnologien (P42)

Appears in the scientific report 2011
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 Record created 2012-11-13, last modified 2018-02-08



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