Journal Article FZJ-2016-06405

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Complementary Strained Si GAA Nanowire TFET Inverter With Suppressed Ambipolarity

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2016
IEEE New York, NY

IEEE electron device letters 37(8), 950 - 953 () [10.1109/LED.2016.2582041]

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Abstract: In this letter, we present complementary tunneling field-effect transistors (CTFETs) based on strained Si with gate all around nanowire structures on a single chip. The main focus is to suppress the ambipolar behavior of the TFETs with a gate-drain underlap. Detailed device characterization and demonstration of a CTFET inverter show that the ambipolar current is successfully eliminated for both pand n-devices. The CTFET inverter transfer characteristics indicate maximum separation of the high/low level with a sharp transition (high voltage gain) at a Vdd down to 0.4 V. In addition, high noise margin levels of 40% of the applied Vdd are obtained.

Classification:

Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. JARA-FIT (JARA-FIT)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2016
Database coverage:
Current Contents - Engineering, Computing and Technology ; IF < 5 ; JCR ; No Authors Fulltext ; SCOPUS ; Science Citation Index ; Science Citation Index Expanded ; Thomson Reuters Master Journal List ; Web of Science Core Collection
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