Contribution to a conference proceedings/Contribution to a book FZJ-2016-06422

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Si n-TFETs on ultra thin body with suppressed ambipolarity

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2016
IEEE
ISBN: 978-1-5090-2969-3

ESSDERC 2016 - 46th European Solid-State Device Research Conference, LausanneLausanne, Switzerland, 12 Sep 2016 - 15 Sep 20162016-09-122016-09-15 IEEE 408-411 () [10.1109/ESSDERC.2016.7599672]

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Abstract: This paper presents an ultra thin body Si n-TFET which exploits a multi-finger gate layout and steep junction formed by dopant implantation into silicide (IIS) process. The sub-threshold slope (SS) reaches a minimum value of about 45 mV/dec, average SS of <;60mV/dec and 71mV/dec over one and three decades of drain current, respectively. A remarkable high Ion/Ioff ratio (~109) is achieved due to the successfully suppressed ambipolar behavior by the asymmetric source and drain design.


Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. JARA-FIT (JARA-FIT)
  3. PGI-8-PT (PGI-8-PT)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2016
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 Record created 2016-11-18, last modified 2021-01-29



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