Hauptseite > Publikationsdatenbank > Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs |
Contribution to a conference proceedings | FZJ-2019-00038 |
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2017
IEEE
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Please use a persistent id in citations: doi:10.1109/ULIS.2017.7962584
Abstract: In this paper a compact model for intrinsic capacitances for Tunnel field-effect transistors (TFETs) is presented. The model is derived from the carrier concentration and current flowing the channel of a Si Double-Gate (DG) n-type TFET. It represents a particularly good estimation of TFET capacitances and the flexibility of this model makes it possible to apply it for single-gate or p-type TFETs as well. To verify the model, the results are compared with TCAD Sentaurus simulations as well as measurement data. In both case model shows satisfying results.
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