Conference Presentation (After Call)

FZJ-2019-00193

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png SQuBiC1: An integrated control chip for semiconductor qubits

Nielinger, D. (Corresponding author)FZJ* ; Christ, V.FZJ* ; Degenhardt, C.FZJ* ; Geck, L.FZJ* ; Grewing, C.FZJ* ; Kruth, A.FZJ* ; Liebau, D.FZJ* ; Muralidharan, P.FZJ* ; Schubert, P.FZJ* ; Vliex, P.FZJ* ; Zambanini, A.FZJ* ; van Waasen, S.FZJ*

2018

Please use a persistent id in citations: http://hdl.handle.net/2128/21203

Abstract: The Central Institute for Electronic Systems at Forschungszentrum Jülich develops, designs and tests scalable solutions for the control and readout of qubits to be used in future quantum computers. The focus lies on highly integrated system-on-chip (SoC) solutions leveraging state-of-the-art commercial semiconductor technologies.We are working according to the V-model of engineering to approach system solutions in a top-down design and bottom-up implementation. As part of the bottom-up implementation, we designed and layouted a first test chip in a commercial 65nm CMOS process . The chip contains all infrastructure needed to control a GaAs semiconductor qubit. It features a DC-digital-to-analog converter (DC-DAC) that generates the tuning voltages in the range of 0V to +1V to bring the qubit into the operation point. The pulse DAC, running at 250MHz, generates pulses with ± 4mV amplitude to generate gate sequences for operating the qubit. In this presentation, we will describe the chip architecture in detail and show corresponding simulation results.

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Contributing Institute(s):

1. Zentralinstitut für Elektronik (ZEA-2)

Research Program(s):

1. 524 - Controlling Collective States (POF3-524) (POF3-524)

Appears in the scientific report 2018

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