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Conference Presentation (After Call) | FZJ-2021-03461 |
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2021
Please use a persistent id in citations: http://hdl.handle.net/2128/28893
Abstract: A scalable eight channel DAC designed in a TSMC 65-nm CMOS technology for generation of solid-state quantum bit (qubit) bias voltages is presented. Measurement results of the DAC and some additional auxiliary components like an on-chip amplifier and sigma-delta modulator at 6 K are discussed. With a low-power consumption of 2.7 μW per channel, the DAC fulfills the requirements to be placed next to qubits inside a mixing chamber of a dilution refrigerator, showing a promising way for scaling qubit numbers toward a quantum computer.
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