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| Hauptseite > Publikationsdatenbank > Modelling, implementation and characterization of a Bias-DAC in CMOS as a building block for scalable cryogenic control electronics for future quantum computers |
| Hauptseite > Publikationsdatenbank > Modelling, implementation and characterization of a Bias-DAC in CMOS as a building block for scalable cryogenic control electronics for future quantum computers |
| Book/Dissertation / PhD Thesis | FZJ-2021-04931 |
2021
Forschungszentrum Jülich GmbH Zentralbibliothek, Verlag
Jülich
ISBN: 978-3-95806-588-8
Please use a persistent id in citations: http://hdl.handle.net/2128/30068
Abstract: Quantum computing is a research field of increasing attention and popularity, which has steadily gained momentum in the recent years. The promises made for universal QC are vast in terms of their predicted impact to science, economy and society. A universal quantum computer will be able to solve specific tasks up to exponentially faster than any modern supercomputer. Applications range from quantum chemistry in catalyst research and protein folding simulations to search algorithms for unordered databases and cryptography. Quantum bits are typically operated inside a dilution refrigerator at temperatures close to absolute zero, i.e. < 1K. The majority of the QC scientific research community agrees that an estimated number of $\gtrapprox$ 10$^{6}$ quantum bits are required to build an universal quantum computer. This number leads to foreseeable connectivity bottlenecks to fed all the required biasing, control and read-out signals into the cryostat. This work is using a TSMC 65 nm CMOS technology to integrate classical control electronics closer with the quantum bits and thus pave a way for scalability. Other publications showed the feasibility of operating CMOS technologies at deep cryogenic temperatures. Whereas various papers presented implementations of cryogenic electronics for quantum bit control, a scalable solution for quantum bit biasing is missing and is the focus of this work. A capacitive digital-to-analog converter (DAC) for biasing of quantum bits is modeled, implemented and characterized at cryogenic temperatures. Special emphasis is placed upon achieving a systematically scalable and ultra-low power DAC design. The DAC design includes a reference voltage coarse tuning scheme in order to lower power consumption and increase resolution. Two calibration procedures to mitigate gain error induced output voltage jumps are described and the most promising approach is verifiedat cryogenic temperatures. Auxiliary circuitry is added to enable DAC characterization, i.e. operational amplifiers and a ΣΔ modulator. System level considerations as well as implementation details and measurement results for of all these circuit blocks are presented. The design and implementation of a bandgap reference and a linear regulator, which are investigated as building blocks for cryogenic supply and reference voltage regulation, are also described. Measurement results of these circuit blocks at cryogenic temperatures are also part of this work. All circuit designs are aimed at optimum robustness and high configurability in order to cope with cryogenic CMOS effects and the lack of valid device models in the temperature regime of interest.
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