Journal Article

FZJ-2019-00039

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Biswas, A. (Corresponding author) ; Luong, G. V.FZJ* ; Chowdhury, M. F. ; Alper, C. ; Zhao, Q.-T. (Collaboration author)FZJ* ; Udrea, F. ; Mantl, S.FZJ* ; Ionescu, A. M.

2017
IEEE New York, NY

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Please use a persistent id in citations: doi:10.1109/TED.2017.2665527

Abstract: This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear onset of the output characteristics, and the temperature dependence. Experimental calibration on long channel (350 nm) complementary n- and p-type sSi NW TFETs has been performed to create the model, which is used to systematically benchmark the main analog figures of merit at device level: g m /Id, g m /g ds , f T and f T /I d V d , and their temperature dependence from 25°C to 125 °C. This allows for a direct comparison between 28-nm low-power Fully Depleted Silicon on Insulator (FD-SOI) CMOS node and 28-nm double-gate (DG) TFET. We demonstrate unique advantages of sSi DG TFET over CMOS, in terms of: 1) reduced temperature dependence of subthreshold swing; 2) higher transconductance per unit of current with peaks close to 40 V -1 , for currents lower than 10 nA/μm; and 3) higher unity gain frequency per unit power for currents below 10 nA/μm.

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Contributing Institute(s):

1. Halbleiter-Nanoelektronik (PGI-9)

Research Program(s):

1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2018

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Database coverage:
; Clarivate Analytics Master Journal List ; Current Contents - Engineering, Computing and Technology ; Ebsco Academic Search ; IF < 5 ; JCR ; SCOPUS ; Science Citation Index ; Science Citation Index Expanded ; Web of Science Core Collection

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