Journal Article

FZJ-2021-03500

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Determining the Electrical Charging Speed Limit of ReRAM Devices

von Witzleben, M. (Corresponding author) ; Walfort, S. ; Waser, R.FZJ* ; Menzel, S.FZJ* ; Bottger, U.

2021
IEEE [New York, NY]

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Please use a persistent id in citations: http://hdl.handle.net/2128/28640  doi:10.1109/JEDS.2021.3095389

Abstract: Redox-based random-access memory (ReRAM) has the potential to successfully address the technological barriers that today’s memory technologies face. One of its promising features is its fast switching speed down to 50 ps. Identifying the limiting process of the switching speed is, however, difficult. At sub-nanosecond timescales three candidates are being discussed: An intrinsic limitation, being the migration of mobile donor ions, e.g., oxygen vacancies, the heating time, and its electrical charging time. Usually, coplanar waveguides (CPW) are used to bring the electrical stimuli to the device. Based on the data of previous publications, we show, that the rise time of the effective electrical stimulus is mainly responsible for limiting the switching speed at the sub-nanosecond timescale. For this purpose, frequency domain measurements up to 40 GHz were conducted on three Pt\TaO x \Ta devices with different sizes. By multiplying the obtained scattering parameters of these devices with the Fourier transform of the incoming signal, and building the inverse Fourier transform of this product, the voltage at the ReRAM device can be determined. Finally, the rise time of the voltage at the ReRAM device is calculated, which is a measure to the electrical charging time. It was shown that this rise time amounts to 2.5 ns for the largest device, which is significantly slower than the pulse generator’s rise time. Reducing the device’s rise time down to 66 ps is possible, but requires smaller features sizes and other optimizations, which we summarize in this paper.

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Contributing Institute(s):

1. Elektronische Materialien (PGI-7)
2. JARA-FIT (JARA-FIT)

Research Program(s):

1. 5233 - Memristive Materials and Devices (POF4-523) (POF4-523)
2. Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC -, Teilvorhaben: Forschungszentrum Jülich (16ES1133K) (16ES1133K)
3. BMBF-16ES1134 - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC - (BMBF-16ES1134) (BMBF-16ES1134)

Appears in the scientific report 2021

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