Conference Presentation (After Call) FZJ-2024-06810

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On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core

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2024

31st IEEE International Conference on Electronics Circuits and Systems, ICECS'24, NancyNancy, France, 18 Nov 2024 - 20 Nov 20242024-11-182024-11-20 [10.34734/FZJ-2024-06810]

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Abstract: Advancements in memory technology havepositioned memristors at the forefront of non-volatile memoryapplications, necessitating precise control mechanisms toaccurately program memristor cells to their respective states.This study delves into the utilization of a RISC-V processor andPWM generators to configure registers for analog conductancecontrol of crossbar memristor array architecture for accuratevoltage and current mode operations. The core contribution isthe development of a flexible and efficient control algorithmspecifically designed for RISC-V. A Universal VerificationMethodology Framework (UVMF) testbench is employedto validate control signals, ensuring their accuracy priorto hardware implementation. Results indicate significantenhancements in control efficiency, underlining the potential forintegrating RISC-V with memristor technology.

Keyword(s): Engineering, Industrial Materials and Processing (1st) ; Others (2nd)


Contributing Institute(s):
  1. Zentralinstitut für Elektronik (ZEA-2)
Research Program(s):
  1. BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) (BMBF-16ME0398K)
  2. 5234 - Emerging NC Architectures (POF4-523) (POF4-523)

Appears in the scientific report 2024
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 Datensatz erzeugt am 2024-12-06, letzte Änderung am 2025-01-29


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