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Journal Article | FZJ-2015-07284 |
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2015
IEEE
New York, NY
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Please use a persistent id in citations: doi:10.1109/JETCAS.2015.2426491
Abstract: Resistively switching devices are key enabler for future hybrid CMOS/nano-crossbar array architectures. Due to the availability of nonvolatile states novel reconfigurable in-memory computing approaches become feasible. In particular complementary resistive switches are highly attractive cross-point junction elements due to their inherent sneak path prevention. By applying a nondestructive capacitive readout procedure the complementary resistive switches implement reconfigurable associative capacitive networks. Those networks establish the functionality of content addressable memories and enable memory intensive computing operations for realization of pattern recognition tasks. These are essential for router or network switch applications. In this study a highly accurate physics-based dynamical memristive device model is used to evaluate the network properties for various configurations. The high ON-to-OFF ratio of electrochemical metallization cells beneficially supports the functionality of the network. The voltage margin and energy consumption are analyzed for various crossbar array sizes. Moreover, a test setup to study those networks supported by measurements was developed and proof-of-concept results for a pre-programmed capacitive array are presented.
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