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Mont-Blanc 2020

Mont-Blanc 2020, European scalable, modular and power efficient HPC processor

CoordinatorBULL SAS ; KALRAY SA ; Forschungszentrum Jülich ; ARM LIMITED ; Atomic Energy and Alternative Energies Commission ; SIPEARL ; SEMIDYNAMICS TECHNOLOGY SERVICES SL ; BARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACION
Grant period2017-12-01 - 2021-03-31
Funding bodyEuropean Union
Call numberH2020-ICT-2017-1
Grant number779877
IdentifierG:(EU-Grant)779877

Note: The Mont-Blanc 2020 (MB2020) project ambitions to initiate the development of a future low-power European processor for Exascale. MB2020 lays the foundation for a European consortium aiming at delivering a processor with great energy efficiency for HPC and server workloads. A first generation product is scheduled in the 2020 time frame. Our target is to reach exascale-level power efficiency (50 Gflops/Watt at processor level) with a second generation planned for 2022. Therefore, we will, within MB2020: 1. define a low-power System-on-Chip (SoC) implementation targeting Exascale, with built-in security and reliability features; 2. introduce strong innovations to improve efficiency with real-life applications and to outperform competition (vector instruction implementation, memory latency and bandwidth, power management, 2.5D integration); 3. develop key modules (IPs) needed for this implementation; 4. provide a working prototype demonstrating MB2020 key components and system level simulations, with a co-design approach based on real-life applications; 5. explore the reuse of these building blocks to serve other markets than HPC. Our key choices are: a) To use the ARM ISA (Instruction Set Architecture) because its has strong technological relevance and it offers a dynamic ecosystem, which is needed to deliver the system software and applications mandatory for successful market acceptance. b) To design, implement or leverage new technologies (Scalable Vector Extension, NoC, High Bandwidth Memory, Power Management, …) as well as innovative packaging technologies to improve the versatility, performance, power efficiency, reliability, and security of the processor. c) To improve on the economic sustainability of processor development through a modular design that allows to retarget our SoC for different markets.
     

Recent Publications

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http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Contribution to a conference proceedings  ;
Assessing the State of Autovectorization Support based on SVE
2022 IEEE International Conference on Cluster Computing (CLUSTER), HeidelbergHeidelberg, Germany, 5 Sep 2022 - 8 Sep 20222022-09-052022-09-08 IEEE 556–562 () [10.1109/CLUSTER51413.2022.00073] OpenAccess  Download fulltext Files  Download fulltextFulltext by OpenAccess repository BibTeX | EndNote: XML, Text | RIS

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Contribution to a conference proceedings/Contribution to a book  ;  ;  ;  ;  ;  ;  ;  ;  ;  ;  ;  ;  ;  ;
Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE) : [Proceedings] - IEEE, 2021. - ISBN 978-3-9819263-5-4 - doi:10.23919/DATE51398.2021.9474093
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), GrenobleGrenoble, France, 1 Feb 2021 - 5 Feb 20212021-02-012021-02-05 136-141 () [10.23919/DATE51398.2021.9474093]   Download fulltextFulltext BibTeX | EndNote: XML, Text | RIS

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Contribution to a conference proceedings  ;  ;  ;  ;
Performance Evaluation of ParalleX Execution model on Arm-based Platforms
2020 IEEE International Conference on Cluster Computing (CLUSTER), KobeKobe, Japan, 14 Sep 2020 - 17 Sep 20202020-09-142020-09-17 IEEE 567-575 () [10.1109/CLUSTER49012.2020.00080] OpenAccess  Download fulltext Files  Download fulltextFulltext by OpenAccess repository BibTeX | EndNote: XML, Text | RIS

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Contribution to a conference proceedings  ;  ;  ;
Porting Applications to Arm-based Processors
2020 IEEE International Conference on Cluster Computing (CLUSTER), KobeKobe, Japan, 14 Sep 2020 - 17 Sep 20202020-09-142020-09-17 IEEE 559-566 () [10.1109/CLUSTER49012.2020.00079]  Download fulltext Files BibTeX | EndNote: XML, Text | RIS

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Conference Presentation (After Call)  ;  ;  ;  ;
Enabling HPC Applications for SVE
Arm Research Summit 2019, AustinAustin, USA, 15 Sep 2019 - 18 Sep 20192019-09-152019-09-18 OpenAccess  Download fulltext Files  Download fulltextFulltext by OpenAccess repository BibTeX | EndNote: XML, Text | RIS

All known publications ...
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 Datensatz erzeugt am 2018-02-02, letzte Änderung am 2023-02-10
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