Contribution to a conference proceedings/Contribution to a book FZJ-2019-00021

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Experimental characterization of the static noise margins of strained silicon complementary tunnel-FET SRAM

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2017
IEEE

2017 47th European Solid-State Device Research Conference (ESSDERC) : [Proceedings] - IEEE, 2017. - ISBN 978-1-5090-5978-2 - doi:10.1109/ESSDERC.2017.8066587
ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC), LeuvenLeuven, Belgium, 11 Sep 2017 - 14 Sep 20172017-09-112017-09-14
IEEE 42-45 () [10.1109/ESSDERC.2017.8066587]

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Abstract: Half SRAM cells with strained Si nanowire complementary Tunnel-FETs (CTFET) have been fabricated to explore the capability of TFETs for 6T-SRAM. Static measurements on cells with outward faced n-TFET access transistors have been performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage at certain bias configuration of the access transistor may lead to malfunctioning storage operation, even without the contribution of the ambipolar behavior. Lowering the bit-line bias is found to mitigate such effect resulting in functional hold, read and write operation.


Contributing Institute(s):
  1. Halbleiter-Nanoelektronik (PGI-9)
  2. Helmholtz - Nanofacility (HNF)
Research Program(s):
  1. 521 - Controlling Electron Charge-Based Phenomena (POF3-521) (POF3-521)

Appears in the scientific report 2018
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 Record created 2019-01-03, last modified 2021-01-30


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