Home > Publications database > Stateful Three-Input Logic with Memristive Switches |
Journal Article | FZJ-2019-04815 |
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2019
Macmillan Publishers Limited, part of Springer Nature
[London]
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Please use a persistent id in citations: http://hdl.handle.net/2128/23178 doi:10.1038/s41598-019-51039-6
Abstract: Memristive switches are able to act as both storage and computing elements, which make them an excellent candidate for beyond-CMOS computing. In this paper, multi-input memristive switch logic is proposed, which enables the function X OR (Y NOR Z) to be performed in a single-step with three memristive switches. This ORNOR logic gate increases the capabilities of memristive switches, improving the overall system efficiency of a memristive switch-based computing architecture. Additionally, a computing system architecture and clocking scheme are proposed to further utilize memristive switching for computation. The system architecture is based on a design where multiple computational function blocks are interconnected and controlled by a master clock that synchronizes system data processing and transfer. The clocking steps to perform a full adder with the ORNOR gate are presented along with simulation results using a physics-based model. The full adder function block is integrated into the system architecture to realize a 64-bit full adder, which is also demonstrated through simulation.
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