Contribution to a conference proceedings FZJ-2020-00914

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Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers

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2019
IEEE

2019 IEEE International Symposium on Circuits and Systems (ISCAS), SapporoSapporo, Japan, 26 May 2019 - 29 May 20192019-05-262019-05-29 IEEE 1 - 5 () [10.1109/ISCAS.2019.8702442]

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Abstract: We report on our systems engineering activities concerning cryogenic CMOS electronics as building blocks for scalable quantum computers. Following the V-model of engineering, the topic is approached both in top-down and in bottom-up fashion. We show the main results from the top-down study using system modeling and simulations. In a bottom-up fashion, a prototype chip was designed and implemented in a commercial 65nm CMOS process. The chip contains a DC digital-to-analog-converter (DC-DAC) and a Pulse-DAC as building blocks for an integrated quantum bit control. The DC-DAC is able to tune a qubit into its operating point. The Pulse-DAC generates pulse patterns with 250MHz sampling frequency to perform gate operations on a qubit.


Contributing Institute(s):
  1. Zentralinstitut für Elektronik (ZEA-2)
Research Program(s):
  1. 524 - Controlling Collective States (POF3-524) (POF3-524)

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