Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors

Glass, S.; Schulte-Braucks, C.; Buca, D.; Rieger, T.; Zhao, Q. T.; Strangio, S.; Mantl, S.; von den Driesch, N.; Narimani, K.

doi:10.1063/1.4996109

Journal Article

FZJ-2018-03826

Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors

Glass, S. (Corresponding author)FZJ* ; von den Driesch, N.FZJ* ; Strangio, S. ; Schulte-Braucks, C.FZJ* ; Rieger, T.FZJ* ; Narimani, K.FZJ* ; Buca, D.FZJ* ; Mantl, S.FZJ* ; Zhao, Q. T.FZJ*

2017
American Inst. of Physics Melville, NY

Applied physics letters 111(26), 263504 - (2017) [10.1063/1.4996109]

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Please use a persistent id in citations: http://hdl.handle.net/2128/19399 doi:10.1063/1.4996109

Abstract: The benefits of a gate-normal tunneling architecture in enhancing the on-current and average subthreshold swing of tunneling field-effect transistors were scrutinized in experiment through careful physical analysis of a Si0.50Ge0.50/Si heterostructure. In accordance with theoretical predictions, it is confirmed that the on-current is governed by line tunneling scaling with the source-gate overlap area of our devices. Our analysis identifies the early onset of parasitic diagonal tunneling paths as most detrimental for a low average subthreshold swing. By counter doping the channel, this onset can be shifted favorably, permitting low average subthreshold swings down to 87 mV/dec over four decades of drain current and high on-off current ratios exceeding 106.

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